Introduction Venus is the second planet from the Sun; it orbits the sun at 224.7 earth days.
Atmosphere of Venus is very challenging for any kind of surface exploration, atmospheric composition of Venus is approximately 96.5% CO2 , 3.5% Nitrogen and traces of SO2,HCL and HF , however atmosphere in Venus is thicker than Earth so nitrogen contents is almost four times than that of Earth . Our main goal is to design a probe that will survive on the surface of Venus, so we would focus on the condition of troposphere that stretches from the surface to 65 km radius of the planet. Air density at surface is 67Kg/m3, temperature at surface is 740k (467°C) and pressure at surface is 90 Earth atms. It can be inferred that 99% of the atmosphere is in the 28km radius of the planet.
There are other concerns that needed to be addressed, Venusian clouds which are composed of SO2 gas and droplets of H2SO4, densest layer of this cloud exist within the troposphere (~48km). 1 Key High Temperature Components ? Pressure vessel integrated with advanced thermal control ? High temperature electronics Active Components (Integrated Circuits) Passive components (Some sensors and actuator) ? Rapid data acquisition system ? High temperature energy storage 2 Main goals to achieve for designing Venus probe ? Prolonged operational time for the High temperature electronic circuits. ? Survivability of the active device, passive device and the packaging materials under extreme condition in Venus. ? Extended lifetime of the components 3 Key issues at Venus environment Venus has a surface temperature of 467°C, so any semiconductor based active device for commercial use will not be operational at these temperature range. Also diffusion and oxidation problems of metals will arise at this temperature, so metal joints at the integrated circuit is another big factor that needs to be considered during the designing process. I have already mentioned about the venusian cloud 1 at the first paragraph, due to its high density, it has reflective nature, adequate amount light cannot reach the surface of Venus. So harnessing solar energy for the surface exploration is not technically possible. Sulfuric acid droplets are present in the cloud decks, so the overall atmosphere is highly caustic.
Table I: Complete list of Venus exploration mission and their survival time 3 High Temperature Electronics Fig 1: Surface of Venus-images captured from Venera 9 and Venera 10 probe Fig 2: Images from Venera-13 probe Active device Table II: Maximum operating temperature of different active devices 2 High Temperature Electronics Silicon on Insulator Silicon on Insulator (SOI) technology (FD SOI & PD SOI) has numerous advantages over the bulk devices,4 ? it has low parasitic capacitance due to the isolation of bulk silicon ,thus improving power consumption ? Reduced temperature dependency due to no doping ? Reduced leakage current, thus it has higher power efficiency But what we have missed so far is its maximum operating temperature, here until now what we have neglected is the intrinsic conductivity of semiconductors, for doped semiconductors, intrinsic conductivity cannot be neglected above a particular temperature.5 Equation I: 5 Fig 3: Intrinsic concentration of various semiconductors as a function of temperature 6 Equation I shows the relation between intrinsic carrier concentration (ni) and the temperature (T). And the square of the intrinsic carrier concentration is directly proportional to the leakage current (Eqn II) Equation II: 5 Fig 4: Leakage current of different thin film SOI devices 7 High Temperature Electronics Another drawbacks of the SOI device is the electro-migration, usually this is a failure mode of the integrated circuits. Electro-migration does not occur on the SOI directly rather on the metal interconnects embedded onto them. Silicon Carbide SiC technology is a major scientific breakthrough in the semiconductor industry.
Band gap of SiC ranges from 2.2 to 3.3 eV .4-H and 6-H SiC devices shows some favorable characteristics as a power electronic device. Among them, three of the important characteristics are highlighted below? Thermal Conductivity – 3 times higher than that of SI devices ? Electric field -critical electric field of SiC is 8 times higher than SI semiconductor devices ? Operating temperature – optimal operating temperature >400C, higher than junction temperature of any SI device .
This is a major breakthrough, as it reduce a significant cost on cooling. 9 Table III: Comparison of characteristics of SIC devices with various SI devices 9 SiC technology can be introduced for the High Temperature electronic components in the Venus probe. However problems that were discussed for the SOI technology will persist for SiC. Main challenges will now include 3 – ? Selection of metal layers to address the diffusion and oxidation problem Fig 5: Solid State Diffusion of dissimilar material at exposure to 500°C 2 High Temperature Electronics Fig 6: Oxidation of metal at elevated temperature Diffusion becomes a significant factor at condition similar to Planet Venus. This will lead to microstructural changes of the material which in turn will influence the strength, conductivity and ductility of the material 2 Selection of die attach material is another concern, CTE (Co-efficient of Thermal Expansion) mismatch between the die and the substrate have to be accommodated by the die attach material. So selecting wrong die attach material will cause the cracking of the die or the coating. Fig 7: Cracking of coatings due to CTE mismatch 2 Requirements for High Temperature die attach materials 10 ? Resistance to corrosion ? Ductility ? Thermal Conductivity > 0.2-0.
3 W/cm-K ? Thermo-mechanical fatigue resistance ? Solidus (>260°C) and Liquidus point (>400°C) ? Compliant CTE mismatch between the die and the substrate High Temperature Electronics Gold Based System Table IV: Existing gold based die attach for high temperature application 10 Chin et al 11 reported that bonding of GaAs device was successfully implanted using Au-In alloys at temperature of 200°C .Further, the EDX analysis showed the bonding layer was the inter-diffusion of Au-In and Au-In2 and it was also mentioned that the process can be performed up to a temperature of 450° C without degradation of the Au-In joints. Fig (8) is the scanned acoustic image (SAM) of die bonded samples at high temperature .No delamination or void is visible before and after the test. Fig 8: (a) SAM image of GaAs die perfectly bonded with alumina substrate using the Au-In composites before the high temperature test.
(b) SAM image of the same spectrum after the high temperature storage at 450°C for 5 minute. (c) SAM image of the same spectrum after further high temperature storage for another 5 minute 11 High Temperature Electronics NASA GEER advancements Philip G. Neudeck et al.
12 reported a demonstration of two 4H-SIC JFET ring oscillator for prolonged time at condition similar to Venus environment without any cooling system and protective packaging .The experiment was performed on the Glenn Extreme Environment Rig (GEER) Overview of the GEER GEER can replicate the Venus condition accurately by providing the amount of superficial fluid expected at Venus surface (96.5 % of CO2, 3.
5 % of N2, 30 ppm of H2O, 150 ppm of SO2, 28 ppm of CO, 15 ppm of OCS, 3 ppm of H2S, 0.5 ppm of HCl and 5 ppb of HF at 92 bar (1330 psi) and 467°C).Specific amount of Gas can be injected and controlled in the GEER. JFET Ring Oscillator Two NASA Glenn fabricated SiC JFET ring oscillator IC: 3-Stage Ring oscillator and 11-Stage Ring oscillator were selected. Advantages of ring oscillator IC for this kind of experiment are summarized as follows: ? Fewer number of wires are used for interconnection ? Harmonic output signals can be detected even in the presence of electrical noise SiC fabrication process The 3-stage Ring oscillator consists of 12 SiC JFETs and 18 SiC n-channel resistors.
The 11-stage Ring oscillator consist of 24 SiC JFETs and 36 SiC n-channel resistors Chip mounting and connection The SiC ring oscillator IC chip was attached to a co-ceramic 92 % alumina substrate with patterned platinum traces, the die attach material used was based on composition of glass and Pt particles which was oven cured at high temperature. Gold wires were used for connection. Fig 9: (a) 11-stage ring oscillator chip attached to ceramic substrate and fiberglass sleeves used for insulation. (b) Completed assemble of the probe ,mesh screen were used which allows the probe to experience simulated the Venus surface condition in the GEER 12 High Temperature Electronics Simulation and results The Chips were tested at the simulated environment for approximately 22 days. During the entire duration of the experiment the oscillation frequencies of both the chips were recorded. Fig 11: GEER conditions measured during the experiment 12 Fig 12: Output signal 12 The 3-Stage oscillator functioned for over the entire 21.
7 days (521 hours) while the 11-Stage oscillator functioned for only 109 hours, after that the output signal deteriorated and after 161 hours signal was completely lost. The 3-Stage oscillator provided an output signal of ~ 1.26 MHz during its entire operation of 521 hours whereas the 11-Stage oscillator provided an output signal of 240 KHz for the first 109 hours, however the 11-Stage oscillator provided a stable output throughout the 109 hour duration. During the post-test examination of the 11-stage Oscillator, after the removal of mesh cap shown in Fig 10(c), it was discovered that all the input/output connection became short circuited .After the chips were disconnected as shown in Fig 10(d) ,further I-V measurements showed that the feedthrough input/output connection remained short circuited. The electrical test leads as shown in Fig 10(d) were attached to the gold substrate wires for independent measurements after the chips were disconnected.
Fig 10: (c) 11-Stage oscillator after passing 21.7 days in the simulated environment (Mesh cap removed). (d) Chips were disconnected for electrical testing purpose 12 Fig 13:25°C clip-lead test waveform data after conclusion of 521 hours test 12 High Temperature Electronics During the clip lead testing it was discovered that the IC was functional throughout the 521 hour operation so it was finally concluded that both SiC IC were functional in the extreme Venus condition without any protection or cooling system throughout the entire 521 hours. However additional studies are currently ongoing regarding the degradation of the feedthroughs. Power Source Despite Venus’ proximity to the sun, solar power cannot be harnessed from the planet’s surface due to the thick reflective cloud deck.
Also the planet’s high surface temperature is another limitation, so the recommended existing solution is the Radio-isotope Thermoelectric Generator (RTG); this power generation system is a proven platform for deep space exploration where solar power is not available. Geoffrey A.Landis et.
al 13 reported an analysis of the thermoelectric converter used in the Cassini probe. Table V: Performance of Radio-isotopic Thermal Converter (RTG)13 Table V shows the performance analysis of RTG at Hot side temperature of 1077°C and cold side temperature of 600°C, the efficiency is only 5%, each RTG produces 30 W of power so number of units of RTG can be added depending on the power requirements of the overall probe.